Director: Professor Jerry G. Fossum

Noteworthy research in this group is the development and application of process/physics-based compact models for thin-film silicon-on-insulator (SOI) MOSFETs, and now multiple-gate devices having ultra-thin Si bodies (UTBs). UFDG (see "UFDG/API/Spice3" in the menu) is our model for generic double-gate (DG) MOSFETs, which is applicable to symmetrical-gate, asymmetrical-gate, and independent-gate devices (e.g., FinFETs in bulk Si as well as SOI), as well as single-gate fully depleted (FD) SOI MOSFETs with UTBs. UFDG contains a good physical accounting for the quantization effects in UTB devices, which underlies the carrier-mobility/transport modeling. In essence, UFDG is a compact Poisson-Schrodinger solver in a circuit simulator. Its physics/process basis makes it quasi-predictive, and thus useful as an aid to optimal design of nanoscale UTB multiple-gate devices and technologies, as well as nonclassical CMOS circuits. Model cards can be defined directly from device structure/physics, and hence reliable device/circuit performance projections can be made with UFDG. Much of the work documented in "Publications and Dissertations" describes and exemplifies the robust utility of UFDG.

The UFDG/API/Spice3 executable file can be obtained through Applied Novel Devices (AND), Inc., via a user's license. The license fee is discounted for universities. Contact Leo Mathew of AND (leomathew@appliednoveldevices.com) or Professor Fossum (fossum@tec.ufl.edu) for information on acquiring a UFDG license.

Early versions of the UFSOI models (for non-fully depleted and fully depleted MOSFETs) were implemented in SOISPICE (see "SOISPICE/UFSOI"), an enhanced version of Spice2. Now they, and UFDG, are implemented in a Type-I interface (API) glued to Spice3, which is used for verification and demonstration as well as transfer to IC companies and universities. The API can be implemented in any circuit simulator with proper glue code. The physics-based models have been continually upgraded and evolved as the SOI and UTB technologies matured, and are now used in collaboration with the IC companies to aid the design of the devices and technologies, as well as circuits. The SOI and UTB device research is supported mainly by the semiconductor industry, but UFSOI models have been transferred to more than 300 sites throughout the world, including many universities.

The original UFSOI/NFD (or, partially depleted (PD)) model was evolved into UFPDB (see "UFSOI/API/Spice3"), which is unified for application to bulk-Si as well as PD/SOI MOSFETs. This model, with only a single small set of process-based paramters, enables reliable benchmarking of scaled PD/SOI CMOS against the bulk-Si counterpart. It contains a physical strained-Si/SiGe option, based on one parameter (the Ge content in the underlying SiGe buffer layer). The UFSOI/FD model is contained in the same files, but has been preempted by UFDG.

The UFSOI models can be downloaded without charge. (see "Download Software"). For basic study of SOI CMOS, SOISPICE, and the associated documentation, can be quite useful. (The executable file of SOISPICE-5.0 is available.) For more advanced studies of contemporary PD/SOI and bulk-Si CMOS, UFPDB should be used. (Source code of UFPDB-2.5, in UFSOI-7.5/API/Spice3, is available.)